• High density
• Space level
• Stacked memory die handling
• Ruggedized packaging
• MCM-C, D & L and cofired substrates
• Dual sided assembly
• Fine line capability (0.004" pitch, 0.004" vias)
• Advanced fine line, controlled impedance, low K dielectric and thermal management techniques
• High speed functional, parametric and dynamic testing
• Active or passive laser trim

For additional information, contact:
microelectronics@teledyne.com